1. Field of the Invention
This invention relates to a semiconductor memory device and more particularly to a NAND flash memory of the floating gate structure which rewrites (writes and erases) data by use of an FN tunnel current.
2. Description of the Related Art
Conventionally, the NAND flash memory is well known in the art as a nonvolatile semiconductor memory device in which data can be electrically rewritten and which is suited to be formed with high integration density and large capacity (large memory capacity) (for example, refer to Jpn. Pat. Appln. KOKAI Publication No. 2006-209969 and Jpn. Pat. Appln. KOKAI Publication No. 2005-353275).
Recently, the integration density of the NAND flash memory is further increased with the improvement of the cell structure and the progress of the fine patterning technique. Further, the high-speed operation is more strongly required with an increase in the memory capacity.
However, the width of and the distance between the word lines of the NAND flash memory become smaller with an increase in the integration density. Therefore, the resistance of the word line becomes high, the coupling capacitance between the word lines becomes large and the influence of coupling noise becomes large. As a result, access time to the memory cell array becomes long and it becomes difficult to attain the high-speed operation.
As described above, in the recent NAND flash memory, since the width of and the distance between the word lines are small, there occurs a problem that access time to the memory cell array becomes long, which means it becomes difficult to attain the high-speed operation.